Design Verification Lead - Graphics / GPU
Apple
St Albans, Hertfordshire, United Kingdom
5d ago

Summary

Do your life’s best work here - with the whole world watching. Join the fast growing team at our UK GPU Design Center.

At Apple, new ideas and complex challenges have a way of becoming phenomenal products, services, and customer experiences very quickly.

  • Come and join a team of extraordinary experts driving significant technology innovation within one of the world’s great companies.
  • The Graphics Verification Lead will be responsible for a team being responsible for the pre-silicon RTL verification of blocks in graphics cores.

    This includes deep understanding of the micro-architectural details of designs and how they work within the broader GPU.

    A strong computer architecture background, preferably in graphics, and a solid foundation in verification methodology will be used to close testing coverage with high confidence.

    Key Qualifications

    You will have multiple years of relevant experience including :

  • Previous success owning DV for a complex GPU block and leading a DV team
  • Expertise with a verification language such as SystemVerilog / UVM / OVM and / or strong software engineering (C / C++) skills
  • Expertise with Verilog / VHDL, HDL simulators, and waveform viewers
  • Experience defining coverage space, writing coverage model, analyzing results
  • Experience working under strict deadlines and leading multiple priorities
  • Graphics architecture knowledge is a plus, though you will have strong knowledge of computer architecture, general purpose microprocessor and memory sub-system micro-architecture in lieu of graphics experience
  • Experience scripting languages like Python, Go, Ruby, Perl a plus
  • Excellent communication and interpersonal skills and ability to collaborate
  • Description

  • You will have full responsibility for DV of a hardware block / IP, including leading a DV team and communicating plans and status to management
  • Develop and track to verification plans on an aggressive schedule through sign-off, in coordination with design leads, architects, and program management
  • Build and maintain verification test bench components and environments
  • Generate directed and directed random tests Run simulations and debug design and environment issues
  • Create functional coverage points, analyze coverage, and improve test environment to target coverage holes
  • Create automated verification flows for block verification
  • Apply knowledge of hardware description languages (VHDL / Verilog), verification languages (SystemVerilog / UVM / OVM), and simulators to verify complex designs in a large ASIC / SOC.
  • Work with other block and core level engineers to ensure seamless verification flow
  • Education & Experience

  • BSc / MSc / BEng / MEng / PhD in related field
  • Additional Requirements

    While we will be opening a satellite office in Cambridge in the near future which will allow for regular work from the site, this job will be based at our primary St. Albans location.

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