Senior FPGA Engineer
L3 Communications
United Kingdom
17d ago

What we do matters. In short, we work to make the world safer. No matter where your talents lie, working as part of L3 TRL Technology means you are directly contributing to a more secure society, helping to protect national security and combat evolving and emerging threats around the world.

We are looking for a Senior FPGA Engineer to join our Electronic Warfare Engineering Team.

What will the role entail?

You will be involved in the design, development and verification of complete FPGA systems, ranging from CPLD developments to complex DSP designs built on the latest state of the art, system on a chip devices.

As a Senior Engineer, you will be expected to take ownership for sub-system development as part of a larger project, which will include leading and mentoring other FPGA engineers within a small team.

You will be expected to take responsibility for subsystem development at all phases of the FPGA development lifecycle, from initial architecture design, requirements specification, and design documentation through to code development, formal verification and final integration.

As projects are multi-disciplinary, you will be able to communicate effectively with other team members, (including hardware, software, PCB and mechanical designers) to agree interface specifications and progress integration solutions.

Flexibility is essential as specifications may not be fully defined at the start of development, and liaison with system architects and project leadership for continued feedback and development of requirements is likely throughout a design activity.

What skills will I need to be successful?

Expert VHDL skills, particularly targeting Xilinx and Altera devices

Experience of achieving robust timing closure in complex FPGA devices

VHDL-based design, implementation and verification experience using self-checking functional verification

Expert experience with Mentor Graphics QuestaSim

Experience with Xilinx Vivado and Intel / Altera Quartus Prime tools

Experience with AXI interface standards

Digital design including interfacing to hardware, peripherals and processors

Experience with modern, team-based version control systems

Ability to work with / develop timing constraints

Ability to develop and maintain scripted build flows (TCL / Python)

What additional skills would be beneficial?

Electronic Warfare domain knowledge

Use of advanced verification methodologies : UVVM, SystemVerilog etc.

Experience of developing fixed point algorithms on FPGA

Use of DOORS documentation and requirements management

Understanding of embedded software (Python,C and C++ )

Experience with Git Version Control

Experience with Continuous Integration approaches and tools (e.g. Jenkins)

Knowledge of DSP algorithm design and implementation for standard DSP building blocks (e.g. IIR / FIR filters, FFT, IFFT, Polyphase Channelizers etc.)

Experience with Matlab and similar DSP modelling tools

What are TRL’s values? What else can we offer you?

Annual bonus plan

25 days holiday (increasing to 30 with length of service)

5% pension plan

Flexible working hours, with a 12pm finish on Fridays

Life Assurance

Employee Share Purchase Plan

Childcare scheme

Access to a Financial Advisor and Occupational Health Service

More details on our complete benefits package can be found on our Careers website.

What else do I need to know?

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